Temperature regulation and in-situ fault detection of wafer warpage

Abstract

Wafer warpage is common in microelectronics processing. Warped wafers can affect device performance, reliability and linewidth control in various processing steps. The author proposed in this thesis an in-situ fault detection technique for wafer warpage in lithography.Early detection will minimize cost and processing time. Based on first principle thermal modeling, it is able to detect warpage fault from available temperature measurements. In this thesis, the use of advanced process control resulted in very small temperature disturbance making it suitable for industrial implementation. More importantly, the sensitivity for detecting warpage is not compromised even though the temperature signal is small. Experimental results demonstrated the feasibility of the approach.