Please use this identifier to cite or link to this item: https://doi.org/10.1145/1216919.1216928
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dc.titleA 1000-word vocabulary, speaker-independent, continuous live-mode speech recognizer implemented in a single FPGA
dc.contributor.authorLin E.C.
dc.contributor.authorYu K.
dc.contributor.authorRutenbar R.A.
dc.contributor.authorChen T.
dc.date.accessioned2018-08-21T05:07:13Z
dc.date.available2018-08-21T05:07:13Z
dc.date.issued2007
dc.identifier.citationLin E.C., Yu K., Rutenbar R.A., Chen T. (2007). A 1000-word vocabulary, speaker-independent, continuous live-mode speech recognizer implemented in a single FPGA. ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA : 60-68. ScholarBank@NUS Repository. https://doi.org/10.1145/1216919.1216928
dc.identifier.isbn1595936009
dc.identifier.isbn9781595936004
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/146269
dc.description.abstractThe Carnegie Mellon In Silico Vox project seeks to move best-quality speech recognition technology from its current software-only form into a range of efficient all-hardware implementations. The central thesis is that, like graphics chips, the application is simply too performance hungry, and too power sensitive, to stay as a large software application. As a first step in this direction, we describe the design and implementation of a fully functional speech-to-text recognizer on a single Xilinx XUP platform. The design recognizes a 1000 word vocabulary, is speaker-independent, recognizes continuous (connected) speech, and is a "live mode" engine, wherein recognition can start as soon as speech input appears. To the best of our knowledge, this is the most complex recognizer architecture ever fully committed to a hardware-only form. The implementation is extraordinarily small, and achieves the same accuracy as state-of-the-art software recognizers, while running at a fraction of the clock speed. Copyright 2007 ACM.
dc.sourceScopus
dc.subjectDSP
dc.subjectFPGA
dc.subjectIn silico vox
dc.subjectSpeech recognition
dc.typeConference Paper
dc.contributor.departmentOFFICE OF THE PROVOST
dc.contributor.departmentDEPARTMENT OF COMPUTER SCIENCE
dc.description.doi10.1145/1216919.1216928
dc.description.sourcetitleACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA
dc.description.page60-68
dc.published.statepublished
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