Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/130611
DC FieldValue
dc.titleVoxelization using FPGAs
dc.contributor.authorLim, G.H.J.
dc.contributor.authorChan, C.L.
dc.contributor.authorChok, N.Y.O.
dc.contributor.authorPrakash, E.C.
dc.contributor.authorPainkras, E.
dc.date.accessioned2016-11-17T08:39:12Z
dc.date.available2016-11-17T08:39:12Z
dc.date.issued1999
dc.identifier.citationLim, G.H.J., Chan, C.L., Chok, N.Y.O., Prakash, E.C., Painkras, E. (1999). Voxelization using FPGAs. International Symposium on IC Technology, Systems and Applications 8 : 197-200. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/130611
dc.description.abstractVoxelization is critical for volume modeling of geometric shapes and graphics primitives. Hardware voxelization has been the dream of researchers for more than a decade now. Traditional software solutions for voxelization are extremely compute intensive and cannot be implemented easily in hardware. Earlier proposals to extend conventional rasterization hardware systems have not delivered the desirable results. The objectives of this work are two fold: to achieve fast voxelization and the algorithm should be implemented easily. To achieve these objectives, we embark on a FPGA based prototype implementation and demonstrate that it is very easy to implement fast voxelization. An FPGA-based hardware implementation of a 3D scan conversion unit is presented. It is based on the 3D scan conversion of line segments. This functionality is extended to scan-convert triangles, and finally tetrahedra. VHDL code and simulation plots are also shown.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCENTRE FOR WIRELESS COMMUNICATIONS
dc.description.sourcetitleInternational Symposium on IC Technology, Systems and Applications
dc.description.volume8
dc.description.page197-200
dc.identifier.isiutNOT_IN_WOS
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