1. ScholarBank@NUS

Liu Yang

rp10460

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Full Name
Liu Yang
(not current staff)
Variants
Liu, Y.
 
Main Affiliation
 
Faculty
 
Email
dcsliuya@nus.edu.sg
 
Other emails
 

Publications

Refined By:
Author:  Jin, S.D.
Date Issued:  [2001 TO 2009]

Results 1-12 of 12 (Search time: 0.003 seconds).

Issue DateTitleAuthor(s)
12008An analyzer for extended compositional process algebrasLiu, Y. ; Sun, J. ; Dong, J.S. 
22008Bounded model checking of compositional processesSun, J. ; Liu, Y. ; Dong, J.S. ; Sun, J.
32008Compositional encoding for bounded model checkingSun, J. ; Liu, Y. ; Dong, J.S. ; Sun, J.
42009Fair model checking with process counter abstractionSun, J. ; Liu, Y. ; Roychoudhury, A. ; Liu, S. ; Dong, J.S. 
52009Formal verification of scalable nonzero indicatorsZhang, S.J.; Liu, Y. ; Sun, J. ; Dong, J.S. ; Chen, W.; Liu, Y.A.
62009Integrating specification and programs for system modeling and verificationSun, J. ; Liu, Y. ; Jin, S.D. ; Chen, C. 
72008Model checking CSP revisited: Introducing a process analysis toolkitSun, J. ; Liu, Y. ; Dong, J.S. 
82009PAT: Towards flexible verification under fairnessSun, J. ; Liu, Y. ; Dong, J.S. ; Pang, J.
92009Scalable multi-core model checking fairness enhanced systemsLiu, Y. ; Sun, J. ; Dong, J.S. 
102008Specifying and verifying event-based fairness enhanced systemsSun, J. ; Liu, Y. ; Dong, J.S. ; Wang, H.H.
112006Verification of computation Orchestration via timed automataDong, J.S. ; Liu, Y. ; Sun, J. ; Zhang, X.
122009Verifying stateful timed CSP using implicit clocks and zone abstractionSun, J. ; Liu, Y. ; Dong, J.S. ; Zhang, X.