Please use this identifier to cite or link to this item: https://doi.org/10.1109/IEDM.2008.4796705
Title: Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack
Authors: Lin, J.
Lee, S.
Oh, H.-J.
Yang, W.
Lo, G.Q.
Kwong, D.L. 
Chi, D.Z.
Issue Date: 2008
Source: Lin, J.,Lee, S.,Oh, H.-J.,Yang, W.,Lo, G.Q.,Kwong, D.L.,Chi, D.Z. (2008). Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack. Technical Digest - International Electron Devices Meeting, IEDM : -. ScholarBank@NUS Repository. https://doi.org/10.1109/IEDM.2008.4796705
Abstract: N-type InGaAs MOS devices are fabricated using HfO2/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH 3 surface passivation are compared. The PH3-passivated MOS capacitances shows high performance with EOT=1.7∼3.0 nm, J g=2x10-5 A/cm2 at Vg=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3%. Silicon implanted InGaAs achieves good n+-p rectifying characteristic and low resistivity in the n+ S/D by 600 °C RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH3-passivation. It shows an excellent S.S.=96 mV/dec and μeff=1600 cm2/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.
Source Title: Technical Digest - International Electron Devices Meeting, IEDM
URI: http://scholarbank.nus.edu.sg/handle/10635/84101
ISBN: 9781424423781
ISSN: 01631918
DOI: 10.1109/IEDM.2008.4796705
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