Please use this identifier to cite or link to this item: https://doi.org/10.1109/VTSA.2008.4530781
Title: P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
Authors: Toh, E.-H.
Wang, G.H.
Weeks, D.
Zhu, M. 
Bauer, M.
Spear, J.
Chan, L.
Thomas, S.G.
Samudra, G. 
Yeo, Y.-C. 
Issue Date: 2008
Source: Toh, E.-H., Wang, G.H., Weeks, D., Zhu, M., Bauer, M., Spear, J., Chan, L., Thomas, S.G., Samudra, G., Yeo, Y.-C. (2008). P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing. International Symposium on VLSI Technology, Systems, and Applications, Proceedings : 24-25. ScholarBank@NUS Repository. https://doi.org/10.1109/VTSA.2008.4530781
Abstract: We realized Impact Ionization Nanowire Multiple-gate Field-Effect Transistors (I-MuGFETs or I-FinFETs) having a multiplegate/nanowire-channel architecture to exploit the superior gate-to-channel coupling for reduced breakdown voltage VBD and enhanced device performance. The first p-channel Impact Ionization MOS transistor (I-MOS) having in situ doped source was also demonstrated. An in situ phosphorus-doped Si source with improved dopant activation and very abrupt junction profile reduces VBD and enhances the on-state current Ion. A further improvement was also made by incorporating strained Si1-yCy, impact-ionization region (I-region) and in situ doped Si1-yCy source, leading to further reduction in VBD and enhancement in I on. This is due to strain-induced reduction of the impact-ionization threshold energy Eth. In addition, excellent subthreshold swing of below 5 mV/decade at room temperature was achieved for all devices. © 2008 IEEE.
Source Title: International Symposium on VLSI Technology, Systems, and Applications, Proceedings
URI: http://scholarbank.nus.edu.sg/handle/10635/84069
ISBN: 9781424416158
DOI: 10.1109/VTSA.2008.4530781
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