High performance high-k/metal gate germanium MOSFETs with shallow junction fabricated by laser thermal process

Abstract

Gate-first self-aligned Ge nMOSFET and pMOSFET with metal gate and CVD HfO 2 have been successfully fabricated, using a novel laser thermal process (LTP) S/D activation. Compared with conventional rapid thermal annealing (RTA) activation, LTP provides smaller S/D series resistance with shallower junction depth while maintaining good gate stack integrity. Much improved drive current is obtained on Ge nMOSFET. A high hole mobility (1.9X of universal Si/SiO 2) is also achieved on Ge pMOSFET. © 2006 IEEE.