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https://scholarbank.nus.edu.sg/handle/10635/83697
Title: | Engineering of voltage nonlinearity in high-K MIM capacitor for analog/mixed-signal ICs | Authors: | Kim, S.J. Cho, B.J. Li, M.-F. Ding, S.-J. Yu, M.B. Zhu, C. Chin, A. Kwong, D.-L. |
Issue Date: | 2004 | Citation: | Kim, S.J.,Cho, B.J.,Li, M.-F.,Ding, S.-J.,Yu, M.B.,Zhu, C.,Chin, A.,Kwong, D.-L. (2004). Engineering of voltage nonlinearity in high-K MIM capacitor for analog/mixed-signal ICs. Digest of Technical Papers - Symposium on VLSI Technology : 218-219. ScholarBank@NUS Repository. | Abstract: | It is demonstrated for the first time that voltage linearity coefficients (VCC) of metal-insulator-metal (MIM) capacitors can be engineered and virtually zero VCC can be achieved by using stacked insulator structure of high-K and SiO 2 dielectrics. Capacitance density of 6 fF/μm 2 and VCC of 14 ppm/V 2 achieved in this work are the best ever reported. The HfO 2/SiO 2 stacked MIM shows excellent performance in other parameters as well, such as low leakage current, low TCC, and stable frequency dependence. | Source Title: | Digest of Technical Papers - Symposium on VLSI Technology | URI: | http://scholarbank.nus.edu.sg/handle/10635/83697 | ISSN: | 07431562 |
Appears in Collections: | Staff Publications |
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