A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancement

Abstract

This paper reports the first demonstration of strain engineering in Impact-ionization MOS (I-MOS) transistors for performance enhancement. An epitaxial silicon-carbon (Si0.99Co0.01) source/drain was integrated in a CMOS-compatible I-MOS fabrication process. The lattice mismatch between Si0.99C0.01 and Si was exploited for the realization of strained I-MOS devices. Uniaxial tensile strain in the channel and impact-ionization regions contributes to enhanced electron transport and device characteristics. The strained I-MOS technology demonstrates an excellent subthreshold swing of 5.3 mV/decade at room temperature for devices with 100 nm gate length. Compared to control I-MOS devices with Si raised source/drain, strained I-MOS devices show significantly higher drive currents and a steeper subthreshold swing. © 2007 IEEE.