Please use this identifier to cite or link to this item: https://doi.org/10.1109/VTSA.2007.378931
Title: A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancement
Authors: Toh, E.-H.
Wang, G.H.
Lo, G.-Q.
Choy, S.-F.
Chan, L.
Samudra, G. 
Yeo, Y.-C. 
Issue Date: 2007
Source: Toh, E.-H.,Wang, G.H.,Lo, G.-Q.,Choy, S.-F.,Chan, L.,Samudra, G.,Yeo, Y.-C. (2007). A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancement. International Symposium on VLSI Technology, Systems, and Applications, Proceedings : -. ScholarBank@NUS Repository. https://doi.org/10.1109/VTSA.2007.378931
Abstract: This paper reports the first demonstration of strain engineering in Impact-ionization MOS (I-MOS) transistors for performance enhancement. An epitaxial silicon-carbon (Si0.99Co0.01) source/drain was integrated in a CMOS-compatible I-MOS fabrication process. The lattice mismatch between Si0.99C0.01 and Si was exploited for the realization of strained I-MOS devices. Uniaxial tensile strain in the channel and impact-ionization regions contributes to enhanced electron transport and device characteristics. The strained I-MOS technology demonstrates an excellent subthreshold swing of 5.3 mV/decade at room temperature for devices with 100 nm gate length. Compared to control I-MOS devices with Si raised source/drain, strained I-MOS devices show significantly higher drive currents and a steeper subthreshold swing. © 2007 IEEE.
Source Title: International Symposium on VLSI Technology, Systems, and Applications, Proceedings
URI: http://scholarbank.nus.edu.sg/handle/10635/83426
ISBN: 1424405858
DOI: 10.1109/VTSA.2007.378931
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