Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2005.855419
Title: Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric
Authors: Yang, T.
Shen, C.
Li, M.F. 
Ang, C.H.
Zhu, C.X. 
Yeo, Y.-C. 
Samudra, G. 
Kwong, D.-L.
Keywords: MOSFETs
Negative bias temperature instability (NBTI)
Silicon oxynitride (SiON)
Issue Date: Oct-2005
Citation: Yang, T., Shen, C., Li, M.F., Ang, C.H., Zhu, C.X., Yeo, Y.-C., Samudra, G., Kwong, D.-L. (2005-10). Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric. IEEE Electron Device Letters 26 (10) : 758-760. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2005.855419
Abstract: New findings of interface trap passivation effect in negative bias temperature instability (NBTI) measurement for p-MOSFETs with SiON gate dielectric are reported. We show evidence to clarify the recent debate: the recovery of Vth shift in the passivation phase of the dynamic NBTI is mainly due to passivation of interface traps (Nit), not due to hole de-trapping in dielectric hole traps (Not). The conventional interface trap measurement methods, dc capacitance-voltage and charge pumping, seriously underestimate the trap density Nit. This underestimation is gate bias dependent during measurement, because of the accelerated interface trap passivation under positive gate bias. Due to this new finding, many of previous reliability studies of p-MOSFETs should be re-investigated. © 2005 IEEE.
Source Title: IEEE Electron Device Letters
URI: http://scholarbank.nus.edu.sg/handle/10635/82557
ISSN: 07413106
DOI: 10.1109/LED.2005.855419
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