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|Title:||Experimental evidence of two conduction mechanisms for direct tunnelling stress-induced leakage current through ultrathin silicon dioxide gate dielectrics|
|Citation:||Samanta, P., Man, T.Y., Chan, A.C.K., Zhang, Q., Zhu, C., Chan, M. (2006-10-10). Experimental evidence of two conduction mechanisms for direct tunnelling stress-induced leakage current through ultrathin silicon dioxide gate dielectrics. Semiconductor Science and Technology 21 (10) : 1393-1401. ScholarBank@NUS Repository. https://doi.org/10.1088/0268-1242/21/10/004|
|Abstract:||A comprehensive analysis of the stress-induced leakage current (SILC) through thermally grown ultrathin silicon dioxide (SiO2) films has been presented based on experimental observations. Stressing and sensing measurements are done in tantalum nitride (TaN) gate metal-oxide-silicon (MOS) capacitors at negative gate bias in the direct tunnelling (DT) regime. Both transient and steady-state DT SILCs have been studied in oxides with thicknesses between 1.7 and 2.3 nm. On the premise of charge carrier generation/trapping characteristics, our experimental results give a better physical insight into the conduction mechanism of SILC through ultrathin SiO2 films stressed in the DT regime. We propose a physical model of SILC conduction on the basis of experimental evidence of two distinctly different conduction paths for DT SILC. Monitoring SILC behaviour, the monoenergetic nature of stress-induced neutral traps and hydrogen-induced defects in the oxide is established. Furthermore, our analysis shows that constant voltage stress degrades the device performance more severely than constant current stress. © 2006 IOP Publishing Ltd.|
|Source Title:||Semiconductor Science and Technology|
|Appears in Collections:||Staff Publications|
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