Please use this identifier to cite or link to this item: https://doi.org/10.1109/12.166611
Title: Single-precision multiplier with reduced circuit complexity for signal processing applications
Authors: Lim, Y.C. 
Issue Date: Oct-1992
Citation: Lim, Y.C. (1992-10). Single-precision multiplier with reduced circuit complexity for signal processing applications. IEEE Transactions on Computers 41 (10) : 1333-1336. ScholarBank@NUS Repository. https://doi.org/10.1109/12.166611
Abstract: When two numbers are multiplied, a double-wordlength product is produced. In applications where only the single-precision product is required, the double-wordlength result is rounded to single-precision. Hence, in single-precision applications, it is not necessary to compute the least significant part of the product exactly. Instead, it is only necessary to estimate the carries generated in the computation of the least significant part that will ripple into the most significant part of the product. This will produce a single-precision multiplier with significantly reduced circuit complexity. Three novel methods for realizing this class of reduced complexity single-precision multipliers are introduced and their performance analyzed.
Source Title: IEEE Transactions on Computers
URI: http://scholarbank.nus.edu.sg/handle/10635/81191
ISSN: 00189340
DOI: 10.1109/12.166611
Appears in Collections:Staff Publications

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