Please use this identifier to cite or link to this item: https://doi.org/10.1088/0268-1242/15/2/311
Title: Modelling of transconductance-to-current ratio (gm/ID) analysis on double-gate SOI MOSFETs
Authors: Rajendran, K. 
Samudra, G.S. 
Issue Date: Feb-2000
Citation: Rajendran, K., Samudra, G.S. (2000-02). Modelling of transconductance-to-current ratio (gm/ID) analysis on double-gate SOI MOSFETs. Semiconductor Science and Technology 15 (2) : 139-144. ScholarBank@NUS Repository. https://doi.org/10.1088/0268-1242/15/2/311
Abstract: A new design methodology based on the surface potential approach of finding transconductance-to-current ratio (gm/ID) and body factor n of fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) MOSFETs is proposed and their effects on physical as well as electrical parameters are studied and analyzed. The methodology is intended for low-power analogue and digital circuits where the weak as well as moderate inversion regions are often used because they provide a good compromise between speed and power consumption. The dependence of gm/ID as well as of their corresponding body factor on temperature is described. The gm/ID ratio indeed is a universal characteristic of all transistors formed by the same process. The study shows that DG SOI MOSFETs have a higher gm/ID ratio and also better body factor values than bulk as well as FD SOI MOSFETs. The present device is a well-suited candidate for the construction of a DG SOI micropower operational transconductance amplifier. This model equation is used to study the influence of various device parameters on gm/ID and their corresponding n. Because the model is quite simple and accurate, it is easy to implement in circuits as well as device simulators.
Source Title: Semiconductor Science and Technology
URI: http://scholarbank.nus.edu.sg/handle/10635/80744
ISSN: 02681242
DOI: 10.1088/0268-1242/15/2/311
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