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|Title:||Integrated instruction cache analysis and locking in multitasking real-time systems|
|Source:||Ding, H.,Liang, Y.,Mitra, T. (2013). Integrated instruction cache analysis and locking in multitasking real-time systems. Proceedings - Design Automation Conference : -. ScholarBank@NUS Repository. https://doi.org/10.1145/2463209.2488916|
|Abstract:||Cache locking improves timing predictability at the cost of performance. We explore a novel approach that opportunistically employs both cache analysis and locking to enhance schedulability in preemptive multi-tasking real-time systems. The cache is spatially shared among the tasks by statically locking a portion of the cache per task. To overcome the issue of limited cache space per task, we keep a portion of the cache unlocked and let all the tasks use it through time-multiplexing. Compared to locking the entire cache for each task during execution, our approach obviates the cost of reloading locked blocks at preemption. But we require static cache analysis for WCET estimation and cache related preemption delay (CRPD) analysis of the unlocked cache space. We design an algorithm to make appropriate locking decisions through accurate costbenefit analysis. Experimental results show that our integrated approach leads to substantially improved schedulability results compared to cache analysis and cache locking employed individually. Categories and Subject Descriptors C.3 [Special-purpose and Application-based Systems]: [Realtime and embedded systems] General Terms Algorithm, Design, Performance. Copyright © 2013 ACM.|
|Source Title:||Proceedings - Design Automation Conference|
|Appears in Collections:||Staff Publications|
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