High frequency characterization of 100 micron pitch wafer level package interconnects

Abstract

In this paper, the characterization of wafer level packages with different types of 100 micron pitch off-chip interconnects in an elastomer probe based test bench is described. The simulated and measured time domain data demonstate 5 gigabit per second performance with the interconnects. Insertion loss of about 3 dB and return loss of 10 dB arc obtained at 5 GHz from frequency domain measurements. © 2005 IEEE.