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|Title:||High frequency characterization of 100 micron pitch wafer level package interconnects|
|Authors:||Jayabalan, J. |
|Source:||Jayabalan, J.,Rotaru, M.D. (2005). High frequency characterization of 100 micron pitch wafer level package interconnects. Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005 1 : 171-174. ScholarBank@NUS Repository.|
|Abstract:||In this paper, the characterization of wafer level packages with different types of 100 micron pitch off-chip interconnects in an elastomer probe based test bench is described. The simulated and measured time domain data demonstate 5 gigabit per second performance with the interconnects. Insertion loss of about 3 dB and return loss of 10 dB arc obtained at 5 GHz from frequency domain measurements. © 2005 IEEE.|
|Source Title:||Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005|
|Appears in Collections:||Staff Publications|
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