Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/72642
Title: Folded gate LDMOS with low on-resistance and high transconductance
Authors: Xu, S.
Zhu, Y.
Foo, P.-D. 
Liang, Y.C. 
Sin, J.K.O.
Issue Date: 2000
Citation: Xu, S.,Zhu, Y.,Foo, P.-D.,Liang, Y.C.,Sin, J.K.O. (2000). Folded gate LDMOS with low on-resistance and high transconductance. IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD) : 55-56. ScholarBank@NUS Repository.
Abstract: In this paper, a novel LDMOSFET is proposed with low on-resistance and high transconductance. The silicon substrate surface is trenched by using an extra mask, resulting in a folded gate structure. The channel density is doubled in the experiment. With the Folded Gate LDMOS (FG-gate LDMOS) concept, the on-resistance was reduced by 40%, while the transconductance was improved by 80%. The significance of the folded gate concept will be available for CMOS and other MOS-gated devices.
Source Title: IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)
URI: http://scholarbank.nus.edu.sg/handle/10635/72642
Appears in Collections:Staff Publications

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