Please use this identifier to cite or link to this item: https://doi.org/10.1109/DFT.2013.6653583
Title: Run-time mapping for reliable many-cores based on energy/performance trade-offs
Authors: Bolchini, C.
Carminati, M.
Miele, A.
Das, A.
Kumar, A. 
Veeravalli, B. 
Issue Date: 2013
Citation: Bolchini, C.,Carminati, M.,Miele, A.,Das, A.,Kumar, A.,Veeravalli, B. (2013). Run-time mapping for reliable many-cores based on energy/performance trade-offs. Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : 58-64. ScholarBank@NUS Repository. https://doi.org/10.1109/DFT.2013.6653583
Abstract: This paper presents a run-time resource manager for NoC-based many-core architectures that dynamically determines the most effective mapping of tasks on the processing nodes of the architecture to optimize system reliability while leveraging on performance and communication energy. An adaptive engine is exploited to pursue the given optimization goal taking into account various metrics. Experimental results for a set of benchmarks show that the adaptive engine (with MTTF optimization only) achieves 16% improvement in MTTF with respect to static pre-computed mapping at a reasonable communication energy overhead of 10%. Further, with MTTF and energy optimization engine turned-on, the adaptive engine is able to minimize communication energy consumption by 50% while exploiting the available MTTF slack. © 2013 IEEE.
Source Title: Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
URI: http://scholarbank.nus.edu.sg/handle/10635/71697
ISBN: 9781479915835
ISSN: 15505774
DOI: 10.1109/DFT.2013.6653583
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