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|Title:||Germanium nanostructures for electronic memory application|
|Citation:||Chim, W.K. (2008). Germanium nanostructures for electronic memory application. IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE : A7-A11. ScholarBank@NUS Repository. https://doi.org/10.1109/SMELEC.2008.4770262|
|Abstract:||The increasing use of portable electronics and embedded systems has resulted in the need for low-voltage, highdensity nonvolatile memory devices. Nanocrystal memories, utilizing the Coulomb blockade effect, have the potential to satisfy such a requirement. The primary motivation in the use of nanocrystal memories is the potential to scale the tunnel dielectric thickness to a small dimension, resulting in lower program and erase voltages during operation. By using nanocrystal charge storage sites that are electrically isolated, charge leakage through localized oxide defects can be reduced, even with the use of a thin tunnel dielectric. In this presentation, methods of synthesizing and controlling the size and distribution of germanium (Ge) nanocrystals in a tri-layer insulator gate stack memory device will be presented. Investigations into the charge storage mechanism and electrical performance of Ge nanocrystal memory devices will be discussed. The role of traps/defects in Ge nanocrystal charge storage and how the energy location of trap levels can be engineered for improved device performance will be presented. Finally, scanning capacitance microscopy/spectroscopy (SCM/SCS), a nanocharacterization technique based on scanning probe microscopy which can be used to analyze electron and hole charging in Ge nanodots, will also be discussed. ©2008 IEEE.|
|Source Title:||IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE|
|Appears in Collections:||Staff Publications|
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