Please use this identifier to cite or link to this item:
Title: FPGA implementation of digital filters synthesized using the FRM technique
Authors: Lim, Y.C. 
Yu, Y.J.
Zheng, H.Q. 
Foo, S.W.
Keywords: Digital filters
FIR filters
FRM technique
Issue Date: Mar-2003
Source: Lim, Y.C.,Yu, Y.J.,Zheng, H.Q.,Foo, S.W. (2003-03). FPGA implementation of digital filters synthesized using the FRM technique. Circuits, Systems, and Signal Processing 22 (2) : 211-218. ScholarBank@NUS Repository.
Abstract: The effective length of a filter designed using the frequency-response masking (FRM) technique is very long and requires a very large number of delay elements. In this paper, we present some useful techniques for reducing the data transfer between the field programmable gate array (FPGA) and external memory when the random logic is implemented using the FPGA and the delay elements are implemented using an external memory such as dynamic random access memory.
Source Title: Circuits, Systems, and Signal Processing
ISSN: 0278081X
Appears in Collections:Staff Publications

Show full item record
Files in This Item:
There are no files associated with this item.

Page view(s)

checked on Dec 15, 2017

Google ScholarTM


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.