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|Title:||A simple technology for superjunction device fabrication: Polyflanked VDMOSFET|
|Citation:||Gan, K.P., Yang, X., Liang, Y.C., Samudra, G.S., Yong, L. (2002-10). A simple technology for superjunction device fabrication: Polyflanked VDMOSFET. IEEE Electron Device Letters 23 (10) : 627-629. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2002.803770|
|Abstract:||The charge compensation based novel superjunction (SJ) MOSFET outperforms its conventional counterpart. However, the production of SJ devices is limited by its complicated and costly fabrication process. In this letter, a feasible technology on polyflanked vertical double-diffused MOS SJ structure, as in Gan et al., is introduced and demonstrated to have greatly reduced fabrication costs, simplified processes, and overcome the interdiffusion problem of SJ columns. This brings forth the new milestone that SJ MOS devices can now be fabricated by the standard cleanroom facilities.|
|Source Title:||IEEE Electron Device Letters|
|Appears in Collections:||Staff Publications|
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