Effects of surface smoothness and deposition temperature of floating gates in flash memory devices to oxide/nitride/oxide interpoly dielectric breakdown

Abstract

The operational reliability of flash memory devices critically depends on the condition of the interface between the floating gate (polysilicon) and the oxide/nitride/oxide (ONO) interpoly dielectric. A rough low-pressure chemical vapor deposition polysilicon floating gate in flash memory devices produces polysilicon/oxide asperities and convex control polysilicon edges, which can heavily stress the ONO dielectric to a faster breakdown during constant current stress tests. A floating gate surface that has a higher concentration of Si-H bonds prior to thermal oxidation suffers a faster ONO breakdown due to the build-up of a higher internal electrical field and negative charge concentration in the dielectric.