Please use this identifier to cite or link to this item: https://doi.org/10.1109/RTCSA.2005.87
Title: Runtime-coordinated scalable incremental checksum testing of combinational circuits
Authors: Andrei, Ş. 
Chin, W.-N. 
Cheng, A.M.K.
Zhu, Y.
Issue Date: 2005
Source: Andrei, Ş.,Chin, W.-N.,Cheng, A.M.K.,Zhu, Y. (2005). Runtime-coordinated scalable incremental checksum testing of combinational circuits. Proceedings - 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications : 357-360. ScholarBank@NUS Repository. https://doi.org/10.1109/RTCSA.2005.87
Abstract: Circuit testing is the most significant cost in modern chip design and production. Due to the complexity in terms of millions of gates, manufacturers often have to truncate test patterns to make the testing feasible on ATEs with limited capacities. In this paper, we present a novel approach to this challenge by run-time coordinating the algorithm and ATE. A unique combination of a #SAT solver, checksum computation and frame testing enables the efficient incremental testing. Unlike checksums from the communication domain which can only detect the existence of stuck-at faults, our approach differentiates by also locating them. In our experimental results, our method further demonstrates a shorter testing time. © 2005 IEEE.
Source Title: Proceedings - 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
URI: http://scholarbank.nus.edu.sg/handle/10635/43280
ISBN: 0769523463
DOI: 10.1109/RTCSA.2005.87
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