Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSID.2013.192
Title: Lifetime reliability aware architectural adaptation
Authors: Muthukaruppan, T.S.
Mitra, T. 
Issue Date: 2013
Source: Muthukaruppan, T.S., Mitra, T. (2013). Lifetime reliability aware architectural adaptation. Proceedings of the IEEE International Conference on VLSI Design : 227-232. ScholarBank@NUS Repository. https://doi.org/10.1109/VLSID.2013.192
Abstract: Relentless CMOS technology scaling has resulted in increased on-chip temperature leading to serious concerns about lifetime reliability of micro-processors. Though dynamic thermal management techniques can control peak temperature, they often fail to meet the reliability targets due to the complex interplay between temperature and reliability. In this paper, we propose a dynamic reliability management (DRM) technique that exploits architectural adaptation in conjunction with dynamic voltage/frequency scaling (DVFS). We employ an online Bayesian classifier that can efficiently detect the reliable configurations, while a performance prediction model selects the one with best performance among all the reliable configurations. We later extend our approach to meet both reliability and thermal constraints. Experimental results reveal that our adaptive DRM technique achieves reliability targets while reducing performance overhead by 42.30% compared to DVFS and 28.68% compared to DVFS with fetch gating. © 2013 IEEE.
Source Title: Proceedings of the IEEE International Conference on VLSI Design
URI: http://scholarbank.nus.edu.sg/handle/10635/41935
ISBN: 9780769548890
ISSN: 10639667
DOI: 10.1109/VLSID.2013.192
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