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https://doi.org/10.1109/CSE.2009.258
Title: | Performance comparison of four-socket server architecture on HPC workload | Authors: | Kasim, H. March, V. See, S. |
Keywords: | Chip multi-threading Multi-core SPEC benchmark suites |
Issue Date: | 2009 | Citation: | Kasim, H.,March, V.,See, S. (2009). Performance comparison of four-socket server architecture on HPC workload. Proceedings - 12th IEEE International Conference on Computational Science and Engineering, CSE 2009 1 : 306-311. ScholarBank@NUS Repository. https://doi.org/10.1109/CSE.2009.258 | Abstract: | Recent server architectures embrace a common technology feature: on-chip parallelism via multi-core and CMT (Chip Multi Threading) technologies. However, they also significantly differ in a number of key aspects including clock speed, micro-architecture, cache hierarchy, and memory sub-system. Such differences may lead to difference levels of application performance. This paper presents a performance comparison of the recent four-socket server architecture on various high performance computing (HPC) workloads. Our analysis is based on two benchmark suites from Standard Performance Evaluation Corporation (SPEC): SPEC CPU2006 and SPEC OMP2001. Our analysis shows that no single architecture is the best for all types of workload. In addition, we found that the CPU clock speed, which is often used as the sole performance indicator, does not always reflect application performance. | Source Title: | Proceedings - 12th IEEE International Conference on Computational Science and Engineering, CSE 2009 | URI: | http://scholarbank.nus.edu.sg/handle/10635/41905 | ISBN: | 9780769538235 | DOI: | 10.1109/CSE.2009.258 |
Appears in Collections: | Staff Publications |
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