Please use this identifier to cite or link to this item: https://doi.org/10.1109/CIT.2005.34
Title: A performance and power co-optimization approach for modern processors
Authors: Zhu, Y. 
Wong, W.-F. 
Koh, C.-K.
Issue Date: 2005
Citation: Zhu, Y.,Wong, W.-F.,Koh, C.-K. (2005). A performance and power co-optimization approach for modern processors. Proceedings - Fifth International Conference on Computer and Information Technology, CIT 2005 2005 : 822-828. ScholarBank@NUS Repository. https://doi.org/10.1109/CIT.2005.34
Abstract: In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually required to verify whether a design meets both performance and power requirements. In this paper, an analytical co-optimization approach based on an integrated workload, performance and power model for modem processors is described and studied. A design space consisting of more than 15 architectural and workload parameters can be quickly explored for co-optimization. Validation with measured results obtained from simulators as well as physical processors showed that the model has a good degree of accuracy. We shall describe the details of approach and the model, and show how to apply the approach to the problem of co-optimizing the power and performance of processor design. With the completeness, flexibility and efficiency, our approach provides clear insights into the tradeoffs of designs for performance and power. © 2005 IEEE.
Source Title: Proceedings - Fifth International Conference on Computer and Information Technology, CIT 2005
URI: http://scholarbank.nus.edu.sg/handle/10635/41735
DOI: 10.1109/CIT.2005.34
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