Please use this identifier to cite or link to this item: https://doi.org/10.1109/FCCM.2009.49
Title: Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators
Authors: Sim, J.E. 
Wong, W.-F. 
Teich, J.
Issue Date: 2009
Citation: Sim, J.E., Wong, W.-F., Teich, J. (2009). Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators. Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009 : 279-282. ScholarBank@NUS Repository. https://doi.org/10.1109/FCCM.2009.49
Abstract: Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time algorithm for scheduling reconfiguration tasks given a trace of actors (invocations of hardware kernels) that is both provably optimal and placement-aware. In addition, we will propose a dependence analysis to determine whether for each actor instance, a reconfiguration task is needed prior to its execution in hardware. A case study using the H.264 encoder is presented to compare our algorithm against the state-of-the-art heuristics. © 2009 IEEE.
Source Title: Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009
URI: http://scholarbank.nus.edu.sg/handle/10635/41618
ISBN: 9780769537160
DOI: 10.1109/FCCM.2009.49
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