Please use this identifier to cite or link to this item:
|Title:||Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators|
|Authors:||Sim, J.E. |
|Citation:||Sim, J.E., Wong, W.-F., Teich, J. (2009). Optimal placement-aware trace-based scheduling of hardware reconfigurations for FPGA accelerators. Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009 : 279-282. ScholarBank@NUS Repository. https://doi.org/10.1109/FCCM.2009.49|
|Abstract:||Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time algorithm for scheduling reconfiguration tasks given a trace of actors (invocations of hardware kernels) that is both provably optimal and placement-aware. In addition, we will propose a dependence analysis to determine whether for each actor instance, a reconfiguration task is needed prior to its execution in hardware. A case study using the H.264 encoder is presented to compare our algorithm against the state-of-the-art heuristics. © 2009 IEEE.|
|Source Title:||Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Jul 17, 2018
WEB OF SCIENCETM
checked on Jun 20, 2018
checked on Jul 13, 2018
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.