Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/40746
Title: Targeted data prefetching
Authors: Wong, W.-F. 
Issue Date: 2005
Source: Wong, W.-F. (2005). Targeted data prefetching. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 3740 LNCS : 775-786. ScholarBank@NUS Repository.
Abstract: Given the increasing gap between processors and memory, prefetching data into cache becomes an important strategy for preventing the processor from being starved of data. The success of any data prefetching scheme depends on three factors: timeliness, accuracy and overhead. In most hardware prefetching mechanism, the focus has been on accuracy - ensuring that the predicted address do turn out to be demanded in a later part of the code. In this paper, we introduce a simple hardware prefetching mechanism that targets delinquent loads, i.e. loads that account for a large proportion of the load misses in an application. Our results show that our prefetch strategy can reduce up to 45% of stall cycles of benchmarks running on a simulated out-of-order superscalar processor with an overhead of 0.0005 prefetch per CPU cycle. © Springer-Verlag Berlin Heidelberg 2005.
Source Title: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
URI: http://scholarbank.nus.edu.sg/handle/10635/40746
ISBN: 3540296433
ISSN: 03029743
Appears in Collections:Staff Publications

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