Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSI.Design.2009.42
Title: Temperature aware scheduling for embedded processors
Authors: Jayaseelan, R.
Mitra, T. 
Issue Date: 2009
Source: Jayaseelan, R., Mitra, T. (2009). Temperature aware scheduling for embedded processors. Proceedings: 22nd International Conference on VLSI Design - Held Jointly with 7th International Conference on Embedded Systems : 541-546. ScholarBank@NUS Repository. https://doi.org/10.1109/VLSI.Design.2009.42
Abstract: Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and increased leakage current. In this paper, we propose a temperature aware scheduling technique in the context of embedded multi-tasking systems. We observe that there is a high variability in the thermal properties of different embedded applications. We design temperature-aware scheduling (TAS) scheme that exploits this variability to maintain the system temperature below a desired level while satisfying a number of requirements such as throughput, fairness and real time constraints. Moreover, TAS enables exploration of the tradeoffs between throughput and fairness in temperature-constrained systems. Compared against standard schedulers with reactive hardware-level thermal management, TAS provides better throughput with negligible impact on fairness. © 2009 IEEE.
Source Title: Proceedings: 22nd International Conference on VLSI Design - Held Jointly with 7th International Conference on Embedded Systems
URI: http://scholarbank.nus.edu.sg/handle/10635/40720
ISBN: 9780769535067
DOI: 10.1109/VLSI.Design.2009.42
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