Please use this identifier to cite or link to this item: https://doi.org/10.1145/1370175.1370187
Title: An analyzer for extended compositional process algebras
Authors: Liu, Y. 
Sun, J. 
Dong, J.S. 
Keywords: Fairness
Model Checking
SAT Solvers
Simulation
Issue Date: 2008
Source: Liu, Y.,Sun, J.,Dong, J.S. (2008). An analyzer for extended compositional process algebras. Proceedings - International Conference on Software Engineering : 919-920. ScholarBank@NUS Repository. https://doi.org/10.1145/1370175.1370187
Abstract: System simulation and verification become more demanding as complexity grows. PAT is developed as an interactive system to support composing, simulating and reasoning of process algebra with various extensions like fairness events, global variables and parameterized processes. PAT provides user friendly interfaces to support system modeling and simulation. Furthermore, it embeds two complementing model checking techniques catering for different systems and properties, namely, an explicit on-the-fly model checker which is designed to verify event-based fairness constraints efficiently and a bounded model checker based on state-of-the-art SAT solvers. The model checkers are capable of proving reachability, deadlock-freeness and the full set of Linear Temporal Logic (LTL) properties. Compared to other model checkers, PAT has two key advantages. Firstly, it supports an intuitive annotation of fairness constraints so that it handles large number of fairness constraints efficiently. Secondly, the compositional encoding of system models as SAT problems allows us to handle compositional process algebra effectively. The experimental results show that PAT is capable of verifying systems with large number of states and outperforms the state-of-the-art model checkers in some cases. © May 10-18, 2008.
Source Title: Proceedings - International Conference on Software Engineering
URI: http://scholarbank.nus.edu.sg/handle/10635/40044
ISBN: 9781605580791
ISSN: 02705257
DOI: 10.1145/1370175.1370187
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