Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/39818
Title: Mapping statecharts to verilog for hardware/software co-specification
Authors: Qin, S.
Chin, W.-N. 
Keywords: Homomorphism
Operational semantics
Statecharts
Verilog
Issue Date: 2003
Source: Qin, S.,Chin, W.-N. (2003). Mapping statecharts to verilog for hardware/software co-specification. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2805 : 282-300. ScholarBank@NUS Repository.
Abstract: Hardware-Software co-specification is a critical phase in co-design. Our co-specification process starts with a high level graphical description in Statecharts and ends with an equivalent parallel composition of hardware and software descriptions in Verilog. In this paper, we investigate the Statecharts formalism by providing it a formal syntax and a compositional operational semantics. After that, we design a semantics-preserving mapping function to transform a Statecharts description into Verilog specification. We can combine this mapping with our previous formal partitioning process so as to form a more complete and automated co-specification process. © Springer-Verlag Berlin Heidelberg 2003.
Source Title: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
URI: http://scholarbank.nus.edu.sg/handle/10635/39818
ISSN: 03029743
Appears in Collections:Staff Publications

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