Please use this identifier to cite or link to this item: https://doi.org/10.1142/S0218126605002866
Title: Improved algorithms for low power multiplexor decomposition
Authors: Yang, S. 
Leong, H.W. 
Keywords: Design automation
Logic decomposition
Multiplexor
Power minimization
Issue Date: 2005
Source: Yang, S., Leong, H.W. (2005). Improved algorithms for low power multiplexor decomposition. Journal of Circuits, Systems and Computers 14 (6) : 1085-1099. ScholarBank@NUS Repository. https://doi.org/10.1142/S0218126605002866
Abstract: It has been estimated that multiplexors (MUXes) make up a major portion of the circuitry in a typical chip. Therefore, to reduce power consumption of a chip, it is important to consider the design of MUXes that consumes less power. This is called the low power MUX decomposition problem and has been studied in Ref. 1. This paper improves on the results of Ref. l in two ways: (a) we propose a method to speed up the algorithms in Ref. 1, and (b) we propose a post-optimization procedure to further reduce the overall power dissipation of decompositions obtained by any MUX decomposition algorithm. Using this post-optimization procedure, we have been able to further reduce the power dissipation results of Ref. 1. © World Scientific Publishing Company.
Source Title: Journal of Circuits, Systems and Computers
URI: http://scholarbank.nus.edu.sg/handle/10635/39607
ISSN: 02181266
DOI: 10.1142/S0218126605002866
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