Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/30708
Title: A computing origami: Optimized code generation for emerging parallel platforms
Authors: HAGIESCU MIRISTE ANDREI MIHAI
Keywords: mapping, compilation, flexible, GPU, FPGA, StreamIt
Issue Date: 8-Aug-2011
Citation: HAGIESCU MIRISTE ANDREI MIHAI (2011-08-08). A computing origami: Optimized code generation for emerging parallel platforms. ScholarBank@NUS Repository.
Abstract: This thesis deals with code generation for parallel applications on emerging platforms, in particular FPGA and GPU-based platforms. These platforms expose a large design space, throughout which performance is affected by significant architectural idiosyncrasies. In this context, generating efficient code is a global optimization problem. The code generation methods described in this thesis apply to applications which expose a flexible parallel structure that is not bound to the target platform. The application is restructured in a way which can be intuitively visualized as Origami (the Japanese art of paper folding). The thesis makes three significant contributions: (1) It provides code generation methods starting from a general stream processing language (StreamIt) for both FPGA and GPU platforms. (2) It describes how the code generation methods can be extended beyond streaming applications to finer-grained parallel computation. On FPGAs, this is illustrated by a method that generates configurable floating-point SIMD coprocessors for vectorizable code. On GPUs, the method is extended to applications which expose fine-grained parallel code accompanied by a significant amount of read sharing. (3) It shows how these methods can be used on a platform which consists of multiple GPU devices connected to a host CPU. The methods can be applied to a broad range of applications. They go beyond mapping and provide tightly integrated code generation tools that handle together high-level mapping, code rewriting, optimizations and modular compilation. These methods target FPGA and GPU platforms without requiring user-added annotations. The results indicate the efficiency of the methods described.
URI: http://scholarbank.nus.edu.sg/handle/10635/30708
Appears in Collections:Ph.D Theses (Open)

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