Fabrication of ultra-shallow junctions and advanced gate stacks for ULSI technologies using laser thermal processing

Abstract

In this project, a novel technique known as laser thermal processing (LTP) was employed to fabricate ultra-shallow p+/n junctions and advanced polycrystalline silicon (poly-Si) gate stacks for ultra-large scale integration technologies. The results show that LTP can form highly activated ultra-shallow p+/n junctions with step-like dopant profiles. In addition, LTP can virtually anneal all the crystal damage created by ion implantation. The data obtained from electrical measurements indicate that LTP, when combined with a post-LTP anneal, results in a substantial increase in the carrier concentration at the critical poly-Si gate/gate oxide interface. Thus, the poly-depletion thickness is readily reduced. Time-dependent dielectric breakdown studies show an improvement in gate oxide reliability after LTP at high fluences.