Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/18229
Title: Multibit delta sigma modulator with noise shaping dynamic element matching
Authors: CHEN JIANZHONG ALEX
Keywords: noise shaping, DEM, multibit, DAC, delta sigma modulator, mismatch
Issue Date: 19-Aug-2008
Source: CHEN JIANZHONG ALEX (2008-08-19). Multibit delta sigma modulator with noise shaping dynamic element matching. ScholarBank@NUS Repository.
Abstract: An xDSL (digital subscriber line) system requires a highly linear signal chain because the discrete multi-tone (DMT) modulation scheme is used. Thus the Delta-sigma modulators (DSMs) in the xDSL receiver must have high-resolution and high-linearity as well. A multi-bit DSM is preferred to fulfill these requirements. In practice, however, due to the device mismatch, the multi-bit digital-to-analog converter (DAC) in the feedback path of the DSM, which is nonlinear, degrades the Spurious Free Dynamic Range (SFDR) of the DSM. Dynamic element matching (DEM) techniques have been used to improve the linearity of the DAC. However, most of the existing DEM techniques reduce the spurious tones by spreading them over wide spectrum, resulting in an increased noise floor which degrades the SNR of the DSM. In this way, there is a trade-off between SFDR and SNR. This work proposes a new noise shaping DEM (NS-DEM) technique in an attempt to eliminate the trade-off between the SFDR and SNR of the DSM with the existing DEM. The proposed NS-DEM can be incorporated into most of the existing DEM algorithms and provides noise shaping to the DAC noise while removing the nonlinearity error from the DAC. The proposed NS-DEM is analyzed, evaluated together with a lowpass multi-bit DSM in behavior Matlab simulation, and verified in experiment, in which a dithered DAC employing NS-DEM is realized in a 0.35-?m CMOS process. The test result shows the first-order highpass noise shaping to the DAC noise. Furthermalre a 5th-order multi-bit lowpass DSM with NS-DEM is realized in a 0.35-?m CMOS and achieves 94dB SFDR and 78dB DR in 2.2MHz BW and meets the ADSL2+ specifications.
URI: http://scholarbank.nus.edu.sg/handle/10635/18229
Appears in Collections:Ph.D Theses (Open)

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