Please use this identifier to cite or link to this item: http://scholarbank.nus.edu.sg/handle/10635/112980
Title: Overlap clocking technique for 10 bit 50MHz 3V D/A converter
Authors: Bhatt, Ansuya 
Singh, Raminder Jit 
Tan, Khen-Sang 
Issue Date: 1995
Source: Bhatt, Ansuya,Singh, Raminder Jit,Tan, Khen-Sang (1995). Overlap clocking technique for 10 bit 50MHz 3V D/A converter. International Symposium on VLSI Technology, Systems, and Applications, Proceedings : 361-364. ScholarBank@NUS Repository.
Abstract: A 10-bit high-speed Digital-to-Analog (D/A) converter with small silicon area has been designed and fabricated using a new technique of overlap clocking for current switching to achieve low glitch energy. Common centroid layout technique has been used to achieve 10-bit accuracy without using any trimming. The D/A converter achieves 30 pV.s glitch energy while operating at 50 MHz with 3V supply.
Source Title: International Symposium on VLSI Technology, Systems, and Applications, Proceedings
URI: http://scholarbank.nus.edu.sg/handle/10635/112980
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