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|Title:||Note on optimal tile partition for space region of integrated-circuit geometry||Authors:||Ku, L.-P.
|Issue Date:||1996||Citation:||Ku, L.-P.,Leong, H.W. (1996). Note on optimal tile partition for space region of integrated-circuit geometry. IEE Proceedings: Computers and Digital Techniques 143 (4) : 246-248. ScholarBank@NUS Repository.||Abstract:||An OTP algorithm for solving the optimal tile-partitioning problem has recently been published. The OTP algorithm makes use of an elimination algorithm to find a maximum set of nonintersecting critical partition edges. It is shown that this elimination algorithm is flawed. © IEE, 1996.||Source Title:||IEE Proceedings: Computers and Digital Techniques||URI:||http://scholarbank.nus.edu.sg/handle/10635/99349||ISSN:||13502387|
|Appears in Collections:||Staff Publications|
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