Please use this identifier to cite or link to this item: https://doi.org/10.1109/VTSA.2009.5159297
Title: P-FinFETs with Al segregated NiSi/p+-Si source/drain contact junction for series resistance reduction
Authors: Sinha, M.
Lee, R.T.P. 
Devi, S.N.
Lo, G.-Q.
Chor, E.F. 
Yeo, Y.-C. 
Issue Date: 2009
Citation: Sinha, M., Lee, R.T.P., Devi, S.N., Lo, G.-Q., Chor, E.F., Yeo, Y.-C. (2009). P-FinFETs with Al segregated NiSi/p+-Si source/drain contact junction for series resistance reduction. International Symposium on VLSI Technology, Systems, and Applications, Proceedings : 74-75. ScholarBank@NUS Repository. https://doi.org/10.1109/VTSA.2009.5159297
Abstract: This paper demonstrates the integration of Al segregated NiSi/p +-Si S/D contact junction in p-FinFETs for parasitic series resistance reduction. Al is introduced by ion implant into p+ S/D region followed by nickel deposition and silicidation. Drive current enhancement of ∼15 % is achieved without any degradation of short channel effects. This is attributed to the lowering of Φp B of NiSi on p-Si from 0.4 eV to 0.12 eV with low Al dose of 2 × 1014 atoms-cm-2, leading to lowering of contact resistance at NiSi/p +-Si S/D junction. ©2009 IEEE.
Source Title: International Symposium on VLSI Technology, Systems, and Applications, Proceedings
URI: http://scholarbank.nus.edu.sg/handle/10635/84082
ISBN: 9781424427857
DOI: 10.1109/VTSA.2009.5159297
Appears in Collections:Staff Publications

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