Please use this identifier to cite or link to this item:
https://doi.org/10.1149/1.3572300
DC Field | Value | |
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dc.title | High-k integration and interface engineering for III-V MOSFETs | |
dc.contributor.author | Oh, H.J. | |
dc.contributor.author | Sumarlina, A.B.S. | |
dc.contributor.author | Lee, S.J. | |
dc.date.accessioned | 2014-10-07T04:45:18Z | |
dc.date.available | 2014-10-07T04:45:18Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Oh, H.J., Sumarlina, A.B.S., Lee, S.J. (2011). High-k integration and interface engineering for III-V MOSFETs. ECS Transactions 35 (4) : 481-495. ScholarBank@NUS Repository. https://doi.org/10.1149/1.3572300 | |
dc.identifier.isbn | 9781566778657 | |
dc.identifier.issn | 19385862 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/83798 | |
dc.description.abstract | In this work, we report the comprehensive study of performance enhancement of InGaAs n-MOSFET by plasma PH3 passivation. The calibrated plasma PH3 passivation of the InGaAs surface before CVD high-k dielectric deposition significantly improves interface quality, resulting in suppressed frequency dispersion in C-V, increase in drive-current with high electron mobility, and excellent thermal stability. ©The Electrochemical Society. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1149/1.3572300 | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1149/1.3572300 | |
dc.description.sourcetitle | ECS Transactions | |
dc.description.volume | 35 | |
dc.description.issue | 4 | |
dc.description.page | 481-495 | |
dc.identifier.isiut | 000302650100029 | |
Appears in Collections: | Staff Publications |
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