Please use this identifier to cite or link to this item: https://doi.org/10.1109/ISDRS.2007.4422277
DC FieldValue
dc.titleEnhanced performance in strained n-FET with double-recessed Si:C source/drain and lattice-mismatched SiGe strain-transfer structure (STS)
dc.contributor.authorAng, K.-W.
dc.contributor.authorWong, H.-S.
dc.contributor.authorBalasubramanian, N.
dc.contributor.authorSamudra, G.
dc.contributor.authorYeo, Y.-C.
dc.date.accessioned2014-10-07T04:44:12Z
dc.date.available2014-10-07T04:44:12Z
dc.date.issued2007
dc.identifier.citationAng, K.-W.,Wong, H.-S.,Balasubramanian, N.,Samudra, G.,Yeo, Y.-C. (2007). Enhanced performance in strained n-FET with double-recessed Si:C source/drain and lattice-mismatched SiGe strain-transfer structure (STS). 2007 International Semiconductor Device Research Symposium, ISDRS : -. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/ISDRS.2007.4422277" target="_blank">https://doi.org/10.1109/ISDRS.2007.4422277</a>
dc.identifier.isbn1424418917
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83701
dc.description.abstractWe report on further performance optimization in a novel n-channel transistor (n-FET) with beneath-the-channel strain-transfer structure (STS) and embedded silicon-carbon source/drain (Si:C S/D) stressors. The incorporation of SiGe STS couples additional strain from the S/D stressors to the overlying Si channel, leading to enhanced strain effects in the channel region. In addition, a two-step recess-etch was used to bring the double-recessed S/D stressors in closer proximity, increasing their lattice interactions with the channel and the STS, thereby significantly increasing the saturation drive current I on enhancement over control devices. ©2007 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/ISDRS.2007.4422277
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/ISDRS.2007.4422277
dc.description.sourcetitle2007 International Semiconductor Device Research Symposium, ISDRS
dc.description.page-
dc.identifier.isiutNOT_IN_WOS
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