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|Title:||A robust and production worthy addressable array architecture for deep sub-micron MOSFET's matching characterization||Authors:||Yeo, S.B.
|Issue Date:||2002||Citation:||Yeo, S.B.,Bordelon, J.,Chu, S.,Li, M.F.,Tranchina, B.A.,Harward, M.,Chan, L.H.,See, A. (2002). A robust and production worthy addressable array architecture for deep sub-micron MOSFET's matching characterization. IEEE International Conference on Microelectronic Test Structures : 229-234. ScholarBank@NUS Repository.||Abstract:||A robust addressable array test structure is presented, which allows automated characterization of the MOSFET's matching, with high area and time efficiency, accuracy and repeatability. It features CMOS switches to ensure a full test operation range, and prevent gate oxide breakdown of individual DUTs from destroying the functionality of the whole test structure. The test structure provides superior isolation to minimize cross talk while providing greater flexibility in testing. Testing result (Id mismatch) on wafers of 0.18μm Technology will be presented.||Source Title:||IEEE International Conference on Microelectronic Test Structures||URI:||http://scholarbank.nus.edu.sg/handle/10635/83419|
|Appears in Collections:||Staff Publications|
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