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|Title:||A novel floating body cell memory with a laterally engineered bandgap using a Si-Si:C heterostructure||Authors:||Choi, S.-J.
|Issue Date:||2010||Citation:||Choi, S.-J.,Moon, D.-I.,Ding, Y.,Kong, E.Y.J.,Yeo, Y.-C.,Choi, Y.-K. (2010). A novel floating body cell memory with a laterally engineered bandgap using a Si-Si:C heterostructure. Technical Digest - International Electron Devices Meeting, IEDM : 22.4.1-22.4.4. ScholarBank@NUS Repository. https://doi.org/10.1109/IEDM.2010.5703413||Abstract:||A lateral bandgap engineered floating body cell (FBC) memory is demonstrated for the first time; it features a high-k gate dielectric, a metal gate, and an epitaxially grown Si0.99C0.01 S/D. Design of valence band offset and incorporation of strain effects are achieved from a heterogeneously mismatched lattice for S/D regions. The figures of merit in the FBC memory, particularly the retention time, operational voltage, signal sensing margin, and non-destructive read operation, are remarkably enhanced under various operating conditions. ©2010 IEEE.||Source Title:||Technical Digest - International Electron Devices Meeting, IEDM||URI:||http://scholarbank.nus.edu.sg/handle/10635/83397||ISBN:||9781424474196||ISSN:||01631918||DOI:||10.1109/IEDM.2010.5703413|
|Appears in Collections:||Staff Publications|
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