Please use this identifier to cite or link to this item: https://doi.org/10.1109/ESSDERC.2007.4430936
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dc.titleA complementary-I-MOS technology featuring SiGe channel and I-region for enhancement of impact-ionization, breakdown voltage, and performance
dc.contributor.authorToh, E.-H.
dc.contributor.authorWang, G.H.
dc.contributor.authorChan, L.
dc.contributor.authorLo, G.-Q.
dc.contributor.authorSylvester, D.
dc.contributor.authorHeng, C.-H.
dc.contributor.authorSamudra, G.
dc.contributor.authorYeo, Y.-C.
dc.date.accessioned2014-10-07T04:40:09Z
dc.date.available2014-10-07T04:40:09Z
dc.date.issued2008
dc.identifier.citationToh, E.-H., Wang, G.H., Chan, L., Lo, G.-Q., Sylvester, D., Heng, C.-H., Samudra, G., Yeo, Y.-C. (2008). A complementary-I-MOS technology featuring SiGe channel and I-region for enhancement of impact-ionization, breakdown voltage, and performance. ESSDERC 2007 - Proceedings of the 37th European Solid-State Device Research Conference : 295-298. ScholarBank@NUS Repository. https://doi.org/10.1109/ESSDERC.2007.4430936
dc.identifier.isbn1424411238
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83343
dc.description.abstractWe report the first demonstration of Silicon-Germanium (SiGe) Impact-ionization MOS (I-MOS) transistors that feature a SiGe channel and a SiGe Impact-ionization region. The lower bandgap of SiGe as compared to Si contributes to higher electron and hole impact-ionization rates, leading to avalanche breakdown at a much reduced source voltage and enhanced device performance. Both n- and p-channel I-MOS devices were fabricated on Si 0.75Ge0.25-On-Insulator substrates using a CMOS-compatible process flow. Compared to Si I-MOS, the breakdown voltage of SiGe I-MOS is reduced by ∼1 V along with the doubling of the drive current and transconductance. The subthreshold swing is also improved. Excellent subthreshold swings of 2.88 mV/decade and 3.24 mV/decade are achieved for the n- and p-channel SiGe I-MOS devices, respectively. © 2007 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/ESSDERC.2007.4430936
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/ESSDERC.2007.4430936
dc.description.sourcetitleESSDERC 2007 - Proceedings of the 37th European Solid-State Device Research Conference
dc.description.page295-298
dc.identifier.isiut000252831900064
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