Please use this identifier to cite or link to this item: https://doi.org/10.1109/CICC.2009.5280787
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dc.titleA 1.2-V 2.7-mW 160MHz continuous-time delta-sigma modulator with input-feedforward structure
dc.contributor.authorZhang, J.
dc.contributor.authorYao, L.
dc.contributor.authorLian, Y.
dc.date.accessioned2014-10-07T04:39:48Z
dc.date.available2014-10-07T04:39:48Z
dc.date.issued2009
dc.identifier.citationZhang, J.,Yao, L.,Lian, Y. (2009). A 1.2-V 2.7-mW 160MHz continuous-time delta-sigma modulator with input-feedforward structure. Proceedings of the Custom Integrated Circuits Conference : 475-478. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/CICC.2009.5280787" target="_blank">https://doi.org/10.1109/CICC.2009.5280787</a>
dc.identifier.isbn9781424440726
dc.identifier.issn08865930
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83309
dc.description.abstractA power and area efficient continuous-time input-feedforward delta-sigma modulator (DSM) structure is proposed. The coefficients are optimized to increase the input range and reduce the power. The feedforward paths and the summer are embedded into the quantizer, hence the circuit is simplified, and the power consumption and area are reduced. The prototype chip, fabricated in a 0.13-μm CMOS technology, achieves a 68-dB DR (Dynamic Range) and 66.1-dB SNDR (signal-to-noise-and-distortion ratio) over a 1.25-MHz signal bandwidth with a 160MHz clock. The power consumption of the modulator is 2.7 mW under a 1.2-V supply, and the chip core area is 0.082mm2. © 2009 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/CICC.2009.5280787
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/CICC.2009.5280787
dc.description.sourcetitleProceedings of the Custom Integrated Circuits Conference
dc.description.page475-478
dc.description.codenPCICE
dc.identifier.isiutNOT_IN_WOS
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