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Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSI-TSA.2013.6545607
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dc.title(110)-oriented germanium-tin (Ge0.97Sn0.03) P-channel MOSFETs
dc.contributor.authorZhan, C.
dc.contributor.authorWang, W.
dc.contributor.authorGong, X.
dc.contributor.authorGuo, P.
dc.contributor.authorLiu, B.
dc.contributor.authorYang, Y.
dc.contributor.authorHan, G.
dc.contributor.authorYeo, Y.-C.
dc.date.accessioned2014-10-07T04:39:31Z
dc.date.available2014-10-07T04:39:31Z
dc.date.issued2013
dc.identifier.citationZhan, C.,Wang, W.,Gong, X.,Guo, P.,Liu, B.,Yang, Y.,Han, G.,Yeo, Y.-C. (2013). (110)-oriented germanium-tin (Ge0.97Sn0.03) P-channel MOSFETs. 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 : -. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSI-TSA.2013.6545607" target="_blank">https://doi.org/10.1109/VLSI-TSA.2013.6545607</a>
dc.identifier.isbn9781467330817
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83286
dc.description.abstractWe report the first demonstration of germanium-tin (GeSn) p-channel MOSFETs fabricated on the (110) surface. A gate-last process was used for transistor fabrication. 8 nm of high quality GeSn film was epitaxially grown on Ge (110) substrate. A low temperature disilane (Si2H6) treatment was employed to passivate the GeSn surface prior to TaN/HfO2 gate stack formation. Subthreshold swing S of 113 mV/decade was achieved, the lowest reported for GeSn pMOSFETs. © 2013 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSI-TSA.2013.6545607
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/VLSI-TSA.2013.6545607
dc.description.sourcetitle2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
dc.description.page-
dc.identifier.isiutNOT_IN_WOS
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