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Title: Reduction of leakage and low-frequency noise in MOS transistors through two-step RTA of NiSi-Silicide technology
Authors: Yang, R.
Loh, W.Y.
Yu, M.B.
Xiong, Y-.Z.
Choy, S.F.
Jiang, Y.
Chan, D.S.H. 
Lim, Y.F.
Bera, L.K.
Wong, L.Y.
Li, W.H.
Du, A.Y.
Tung, C.H.
Hoe, K.M.
Lo, G.Q.
Balasubramanian, N.
Kwong, D.-L.
Keywords: Breakdown voltage
Low-frequency noise
NiSi salicidation
Issue Date: 2006
Citation: Yang, R., Loh, W.Y., Yu, M.B., Xiong, Y-.Z., Choy, S.F., Jiang, Y., Chan, D.S.H., Lim, Y.F., Bera, L.K., Wong, L.Y., Li, W.H., Du, A.Y., Tung, C.H., Hoe, K.M., Lo, G.Q., Balasubramanian, N., Kwong, D.-L. (2006). Reduction of leakage and low-frequency noise in MOS transistors through two-step RTA of NiSi-Silicide technology. IEEE Electron Device Letters 27 (10) : 824-826. ScholarBank@NUS Repository.
Abstract: A two-step rapid thermal annealing (RTA) nickel salicidation process was employed to fabricate 0.1-mum gate length CMOS transistors. Excess salicidation, common in the conventional one-step RTA NiSi process, is effectively suppressed by this approach, which is confirmed by transmission electron microscopy (TEM) images. More improvements due to two-step NiSi are observed in NMOS than in PMOS transistors: The n+-p junction diode with two-step NiSi exhibits lower reverse leakage and higher breakdown voltage than the one-step silicided diode. For the first time, it is found that two-step NiSi NMOS exhibits significant reduction in off-state leakage (∼5×) and low-frequency noise (up to two orders of magnitude) over one-step NiSi NMOS, although there is not much difference in PMOS transistors.
Source Title: IEEE Electron Device Letters
ISSN: 07413106
DOI: 10.1109/LED.2006.882567
Appears in Collections:Staff Publications

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