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https://doi.org/10.1063/1.1691170
Title: | Quantum mechanical modeling of gate capacitance and gate current in tunnel dielectric stack structures for nonvolatile memory application | Authors: | Koh, B.H. Chim, W.K. Ng, T.H. Zheng, J.X. Choi, W.K. |
Issue Date: | 1-May-2004 | Citation: | Koh, B.H., Chim, W.K., Ng, T.H., Zheng, J.X., Choi, W.K. (2004-05-01). Quantum mechanical modeling of gate capacitance and gate current in tunnel dielectric stack structures for nonvolatile memory application. Journal of Applied Physics 95 (9) : 5094-5103. ScholarBank@NUS Repository. https://doi.org/10.1063/1.1691170 | Abstract: | A self-consistent quantum mechanical (QM) numerical calculations, using an in-house developed charge quantization simulation program, were conducted to analyze the gate tunneling current and capacitance of metal-insulator- semiconductor (MIS) device with tunnel dielectric stack structures. The transmission probability through the dielectric stack structure was calculated by using a gate current density-gate voltage (Jg-Vg) simulation that uses a recursive method. It was shown that a physical model was used to fit with capacitance-voltage and Jg-Vg measurements on MIS devices with different single-layer dielectric and multilayered dielectric stack structures. | Source Title: | Journal of Applied Physics | URI: | http://scholarbank.nus.edu.sg/handle/10635/82952 | ISSN: | 00218979 | DOI: | 10.1063/1.1691170 |
Appears in Collections: | Staff Publications |
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