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|Title:||Performance enhancement in uniaxial strained silicon-on-insulator N-MOSFETs featuring silicon-carbon source/drain regions||Authors:||Ang, K.-W.
|Keywords:||Lateral tensile strain
|Issue Date:||Nov-2007||Citation:||Ang, K.-W., Chui, K.-J., Tung, C.-H., Balasubramanian, N., Samudra, G.S., Yeo, Y.-C. (2007-11). Performance enhancement in uniaxial strained silicon-on-insulator N-MOSFETs featuring silicon-carbon source/drain regions. IEEE Transactions on Electron Devices 54 (11) : 2910-2917. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2007.906941||Abstract:||We report the demonstration of a novel strained silicon-on-insulator N-MOSFET featuring silicon-carbon (Si1-yCy) source and drain (S/D) regions, tantalum nitride metal gate, and hafnium-aluminum oxide high-κ gate dielectric. Due to the lattice mismatch between Si0.99C0.01 S/D stressors and Si, a lateral tensile strain is induced in the transistor channel, leading to substantial electron mobility enhancement. At a fixed off-state leakage of 100 nA / μm, the Si1-yCyS/D N-MOSFET having a width of 4.7 μm achieves a drive current IDsat enhancement of 16% over a control N-MOSFET. This IDsat enhancement, which is primarily attributed to strain-induced mobility improvement, is found to increase with decreasing gate length LG due to an increased strain level in the transistor channel as the Si1-yCyS/D stressors are placed in closer proximity. Slightly improved series resistance with Si1-yCy S/D regions in a strained N-MOSFET accounted for approximately 2% IDsat gain. In addition, a reduction of device width is found to reduce the drive current enhancement of the N-MOSFETs due to the presence of a transverse compressive strain in the transistor channel induced by the isolation regions. © 2007 IEEE.||Source Title:||IEEE Transactions on Electron Devices||URI:||http://scholarbank.nus.edu.sg/handle/10635/82872||ISSN:||00189383||DOI:||10.1109/TED.2007.906941|
|Appears in Collections:||Staff Publications|
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