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https://doi.org/10.1109/LED.2009.2010532
Title: | Nickel salicided source/drain extensions for performance improvement in ultrascaled (Sub 10 nm) Si-nanowire transistors | Authors: | Jiang, Y. Liow, T.Y. Singh, N. Tan, L.H. Lo, G.Q. Chan, D.S.H. Kwong, D.L. |
Keywords: | Gate-all-around (GAA) silicon nanowire (SiNW) Metallic nanowire (NW) contacts Sheet resistance Ultrathin silicide film |
Issue Date: | 2009 | Citation: | Jiang, Y., Liow, T.Y., Singh, N., Tan, L.H., Lo, G.Q., Chan, D.S.H., Kwong, D.L. (2009). Nickel salicided source/drain extensions for performance improvement in ultrascaled (Sub 10 nm) Si-nanowire transistors. IEEE Electron Device Letters 30 (2) : 195-197. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2009.2010532 | Abstract: | This letter demonstrates successful integration of Gate-All-Around (GAA) nanowire (NW) transistors with low-resistivity metallic NW point contacts at source/drain extensions. Ultrascaled GAA silicon NW transistors with gate lengths down to 8 nm have been achieved, exhibiting good performance among the NW FETs reported to date. Compared to the reference devices, the metallic contact NW devices show 580% enhancement in ION from 103 to 705 μA, at a fixed IOFF of 10 nA/μm. Nickel silicide resistivity for ultrathin films is also investigated in this letter for the integration of salicided source/drain extensions with the GAA NW process. Experimental results show that 4 nm of deposited Ni is suitable for forming NW contacts with 10-nm diameters, which is thin enough to avoid oversilicidation while meeting the low-resistivity requirements. © 2009 IEEE. | Source Title: | IEEE Electron Device Letters | URI: | http://scholarbank.nus.edu.sg/handle/10635/82760 | ISSN: | 07413106 | DOI: | 10.1109/LED.2009.2010532 |
Appears in Collections: | Staff Publications |
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