Please use this identifier to cite or link to this item: https://doi.org/10.1109/55.919239
DC FieldValue
dc.titleInterface traps at high doping drain extension region in sub-0.25-μm MOSTs
dc.contributor.authorChen, G.
dc.contributor.authorLi, M.F.
dc.contributor.authorYu, X.
dc.date.accessioned2014-10-07T04:30:47Z
dc.date.available2014-10-07T04:30:47Z
dc.date.issued2001-05
dc.identifier.citationChen, G., Li, M.F., Yu, X. (2001-05). Interface traps at high doping drain extension region in sub-0.25-μm MOSTs. IEEE Electron Device Letters 22 (5) : 233-235. ScholarBank@NUS Repository. https://doi.org/10.1109/55.919239
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/82558
dc.description.abstractA huge bulk (or drain) current I b (or I d) peak versus gate voltage was observed for the 0.25-μm or sub-0.25-μm metal-oxide-semiconductor field effect transistors (MOSTs) with high doping concentration source/drain extension, when the drain-bulk pn junction is forward biased. This current is increased under Fowler-Nordheim (FN) or channel hot carrier (CHC) stress and is identified as thermal-trap-tunneling electron current at the drain extension-gate overlap region. It is extremely sensitive that one interface trap will induce 0.1 pA current increment of peak I b (or I d).
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/55.919239
dc.sourceScopus
dc.subjectCMOSFETs
dc.subjectHot carriers
dc.subjectReliability
dc.subjectSemiconductor-insulator interfaces
dc.subjectTunneling
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/55.919239
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume22
dc.description.issue5
dc.description.page233-235
dc.description.codenEDLED
dc.identifier.isiut000168402100013
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