Please use this identifier to cite or link to this item: https://doi.org/10.1063/1.1425438
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dc.titleHole injection with limited charge relaxation, lateral nonuniform hole trapping, and transient stress-induced leakage current in impulse-stressed thin (
dc.contributor.authorChim, W.K.
dc.contributor.authorLim, P.S.
dc.date.accessioned2014-10-07T04:29:50Z
dc.date.available2014-10-07T04:29:50Z
dc.date.issued2002-02-01
dc.identifier.citationChim, W.K., Lim, P.S. (2002-02-01). Hole injection with limited charge relaxation, lateral nonuniform hole trapping, and transient stress-induced leakage current in impulse-stressed thin (. Journal of Applied Physics 91 (3) : 1304-1313. ScholarBank@NUS Repository. https://doi.org/10.1063/1.1425438
dc.identifier.issn00218979
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/82474
dc.description.abstractAn anomalously high density of positive trapped charges was observed in thin (4.3-nm thickness) nitrided gate oxides subjected to high-field impulse stressing. Additionally, the transient stress-induced leakage current (AC-SILC) was found to be larger than the steady-state SILC (DC-SILC) in these impulse-stressed thin oxides, contrary to observations in dc-stressed thin oxides. The large AC-SILC was found to be related to the high density of positive trapped holes in the oxide. The hot-hole generation occurs via a regenerative feedback mechanism, with minimal charge relaxation due to the short duration of the impulse stress. This gives rise to an extremely high density of oxide trapped holes that were not observed under dc stress conditions. The trapped holes can be easily annealed electrically at room temperature and the annihilation of the positive oxide trapped charges is accompanied by a reduction in the AC-SILC and a higher number of interface states being created. The trapped holes can either be uniformly or nonuniformly distributed, depending on the polarity of the applied stressing impulse in relation to the substrate doping type. A better understanding of thin oxide degradation under impulse stressing can help in the choice of a suitable write/erase pulse amplitude and duration for use in endurance testing of nonvolatile semiconductor memories to ensure long-term reliable operation. © 2002 American Institute of Physics.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1063/1.1425438
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1063/1.1425438
dc.description.sourcetitleJournal of Applied Physics
dc.description.volume91
dc.description.issue3
dc.description.page1304-1313
dc.description.codenJAPIA
dc.identifier.isiut000173418500062
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